In recent years, development of a memory (a phase change memory) using a resistance element made of a phase change material has been advanced for obtaining a fast and highly integrated non-volatile memory, and such a memory is described in, for example, Non-Patent Document 1. As shown in FIG. 58, the phase change memory is a non-volatile memory in which a difference in resistance value between an amorphous state (reset) of a phase change material and a polycrystalline state (set) thereof is stored as data. When the amorphous state (reset) or the polycrystalline state (set) is to be stored, an electric pulse is used to cause a temperature change with respect to time as shown in FIG. 57, thereby generating the phase transition between the amorphous state (reset) and the polycrystalline state (set).
Note that a high resistance value of the amorphous state and a low resistance value of the polycrystalline state of a phase change material do not require a complete amorphous state and a complete polycrystalline state, and it is important as a storage element that there is a sufficient difference between a high resistance state and a low resistance state. Accordingly, it is possible to take an arbitrary intermediate value between a high resistance state corresponding to the complete amorphous state and a low resistance state corresponding to the complete polycrystalline state.
As described above, a phase change element changes its phase state according to an electric pulse. As shown in FIG. 57, it is necessary for performing a reset operation to supply large current flow in a short period of time to perform rapid cooling. On the contrary, it is necessary for performing a set operation to supply the flow of a current less than that in the reset operation for a relatively long time to perform cooling.
In addition, in the read operation, ‘0’ state and ‘1’ state of a phase change memory corresponding to the reset and the set, respectively, are read by sensing a rate of a voltage drop of a bit-line by using a reading voltage.
Non-Patent Document 1: 2002 IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 202-203